JEDEC JESD51-2 pulse-train constant-DC-bias self-heating transient

PARITYS1 · dim 6

No clear winner. The survival gap is under 10 percentage points and the balanced-score gap is under 0.05, so neither SolvSRK nor the best baseline clears the win threshold. Either works — choose on cost, licensing, or integration effort. All verdicts →

6D Cauer thermal stack driven by constant DC self-heating bias (LRDE row-1 GREEN reduction of the JESD51-2 pulse-train fixture). Reports junction-to-ambient transient temperature with the same network as jesd51_1d_stack.

Semiconductor & electronics

Problem definition

JEDEC JESD51-2 (1995/2008)

Canonical RHS excerpt from the registered callable used for this benchmark cell. Expand it to verify the state equations; it is not a standalone runnable fixture.

Show canonical RHS excerpt
def rhs(t: float, y: np.ndarray) -> np.ndarray:
    return A_csr @ y + b_arr
Parameters
  • A_csr = sparse_matrix(shape=(6, 6), nnz=16)
  • b_arr = [10000, 0, 0, 0, 0, 2.3852]
Initial condition
y(0) = [298.15, 298.15, 298.15, 298.15, 298.15, 298.15]
Horizon
t ∈ [0, 1]

Canonical RHS excerpt captured from the same registered callable used for the published benchmark. Frozen closure values are summarized below; helper imports and solver settings are intentionally omitted.

Fingerprint

Spread: high

Default noise: none

Recommendation snapshot

Clean best: SolvSRK

Noisy best: SciPy Radau

Coverage

14 solver arms · clean + 5 noise levels

Ranked on survival, precision, and speed

Versions & freeze

Methodology →
Freeze
2026-08-13
libsolvsrk
2.3.0
SciPy
1.14
SUNDIALS
CVODE (bundled backend)

20 seeds/cell default · 14 arms · TRL 4–5 · simulation-lab validated · this page: JEDEC JESD51-2 pulse-train constant-DC-bias self-heating transient (jedec-jesd51-2-pulse-train-constant-dc-bias-self-heating-transient)

Governed SolvTune benchmark freeze; per-arm medians only. RHS definitions and raw trial rows are not published.

Self-reported by Resonix Labs · not independently verified

Results matrix

Pick an objective and a noise level to rank all arms on survival, median SCD, median nfev, and median wall time. Medians across seeds.

Objective

Best overall trade-off of survival, precision, and speed.

Noise level

#SolverSurvivalSCDnfevWallScore
1SolvSRK
100%
14.914,33768 ms0.975
2SciPy RadauSciPy
100%
11.082420 ms0.880
3Vern7external
100%
10.65,3724.34 s0.872
4Vern9external
100%
10.58,8344.36 s0.868
5CVODE Adamsexternal
100%
8.498716 ms0.819
6Tsit5external
100%
8.35,3761.40 s0.818
7SciPy RK45SciPy
100%
8.15,16846 ms0.811
8FBDFexternal
100%
8.02955.31 s0.810
9SciPy RK23SciPy
100%
8.03,23935 ms0.810
10CVODE BDFexternal
100%
7.927110 ms0.808
11SciPy DOP853SciPy
100%
7.84,75438 ms0.805
12SciPy LSODASciPy
100%
7.84473 ms0.804
13SciPy BDFSciPy
100%
7.735915 ms0.803
14TRBDF2external
100%
5.23555.62 s0.743

At Clean, best balanced arm is SolvSRK.

Values are medians across seeds, measured by Resonix Labs on Resonix hardware and not independently verified; nfev and wall are on reference lab hardware (indicative). Under injected noise only SolvSRK and the SciPy arms are run. How we measure accuracy → · Verification status →

SolvScout · free

Profile your problem for free

This page shows one published benchmark cell. SolvScout fingerprints your ODE, compares it to the full corpus, and recommends a solver with the same survival / precision / speed ranking you see here — including when a SciPy arm wins.

SolvSRK · 30-day trial

Run the winner on your machine

SolvSRK is the stiffness-adaptive integrator behind the SolvSRK column in these tables. Create an account, activate a machine, and take a 30-day trial — same binary you'd ship after purchase.

Cite this page

Replace the access date. Pin the freeze ID and library versions when comparing against a later export. Cite it as what it is — a self-reported vendor benchmark, not an independently verified result. The note field says so; please keep it.

@misc{resonix_evidence_jedec_jesd51_2_pulse_train_constant_dc_bias_self_heating_transient_2026,
  title        = {Resonix Evidence Portal: JEDEC JESD51-2 pulse-train constant-DC-bias self-heating transient},
  author       = {{Resonix Labs (Canada) Inc.}},
  year         = {2026},
  howpublished = {\url{https://resonix.tech/evidence/problems/jedec-jesd51-2-pulse-train-constant-dc-bias-self-heating-transient}},
  note         = {Self-reported vendor benchmark; internally generated by Resonix Labs and not independently verified. Accessed YYYY-MM-DD. Freeze 2026-08-13; libsolvsrk 2.3.0; SciPy 1.14.}
}

Related

TRL 4–5 · simulation-lab validated · 398 problems · 14 solver arms · clean + 5 noise levels

Freeze: 2026-08-13 · scipy 1.14 · libsolvsrk 2.3.0 · Methodology

Self-reported by Resonix Labs · not independently verified · Verification status